Tomasulo Algorithm Simulator

Interactive demonstration of dynamic scheduling and out-of-order execution using the Tomasulo algorithm. Explore register renaming, reservation stations, and instruction-level parallelism.

Current Mode

Configuration Mode

⚙️ Execution Latency Configuration

Configure how many cycles each instruction type takes to execute

📚 Quick Start Guide

1. Configure Latencies

Set execution latencies for different instruction types above. These determine how many cycles each operation takes.

2. Start Simulation

Click "Start Simulation" to begin. You'll then be able to issue instructions and observe the Tomasulo algorithm in action.

3. Issue & Execute

Add instructions, then use "Step" to advance one cycle or "Run" for automatic execution.

How to Use This Simulator

Key Concepts:

Reservation Stations: Buffer instructions and implement register renaming
Common Data Bus: Broadcasts results to all waiting instructions
Register Renaming: Eliminates false dependencies (WAR/WAW)
Out-of-Order Execution: Instructions complete as soon as operands are ready

Instructions:

Select instruction type (ADD, SUB, MUL, DIV, LOAD, STORE)
Specify destination and source registers
For memory operations, provide address/offset
Click "Issue Instruction" to add to pipeline
Use "Step" or "Run" to execute instructions
Observe reservation stations and register renaming

Instruction Input Panel

Operation

Destination

Source 1

Source 2

Memory Address/Offset (for LOAD/STORE)

Immediate Value (optional)

System Status

Clock Cycle: 0

Instructions Issued: 0

Instructions Completed: 0

IPC: 0.00

Reservation Stations

Add/Sub Units

Tag	Busy	Op	Vj	Vk	Qj	Qk

Multiply/Divide Units

Tag	Busy	Op	Vj	Vk	Qj	Qk

Load/Store Units

Tag	Busy	Op	Address	Value	Q

Register Alias Table

Register	Value	Qi (Reservation Station)

Functional Units Status

Unit	Status	Instruction	Cycles Left

Instruction Timeline

No instructions issued yet. Add instructions to see the execution timeline.

Common Data Bus Activity

No CDB activity yet. Execute instructions to see result broadcasts.

⚙️ Execution Latency Configuration

Current latency settings (read-only during simulation)

Performance Analysis

Structural Hazards: 0

RAW Dependencies: 0

WAR Eliminated: 0

WAW Eliminated: 0

Resource Utilization:

Add/Sub Units

Mul/Div Units

Load/Store Units

Tomasulo Algorithm Simulator

⚙️ Execution Latency Configuration

📚 Quick Start Guide

1. Configure Latencies

2. Start Simulation

3. Issue & Execute

How to Use This Simulator

Key Concepts:

Instructions:

Instruction Input Panel

System Status

Reservation Stations

Add/Sub Units

Multiply/Divide Units

Load/Store Units

Register Alias Table

Functional Units Status

Instruction Timeline

Common Data Bus Activity

Recent Broadcasts:

⚙️ Execution Latency Configuration

Performance Analysis

Resource Utilization: