Reorder Buffer and Out-of-Order Execution

Books and Textbooks

  1. Hennessy, J. L., & Patterson, D. A. (2019). Computer Architecture: A Quantitative Approach (6th ed.). Morgan Kaufmann.

    • Chapter 3: Instruction-Level Parallelism and Its Exploitation
    • Section 3.4: Dynamic Scheduling: Examples and the Algorithm
    • Section 3.6: Hardware-Based Speculation
  2. Shen, J. P., & Lipasti, M. H. (2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press.

    • Chapter 5: Instruction Flow Techniques
    • Chapter 6: Register Data Flow Techniques
    • Chapter 7: Memory Data Flow Techniques